#ifndef _PHY_RX_H
#define _PHY_RX_H


//----------------------------------------------------------------------------
//                      Prime PHY Timer 
//----------------------------------------------------------------------------


/*****************************************************************************/
/* Definitions                                                               */
/*****************************************************************************/

/* AAGC */
#define PHY_RX_AAGC_MODE_AUTO    0x0000
#define PHY_RX_AAGC_MODE_MANUAL  0x0001

/* Carrier detect */
#define PHY_RX_CD_NOT_DETECTED      0x0000   // parm 0
#define PHY_RX_CD_DETECTED          0x0001
#define PHY_RX_PRMB_LEN_UNKNOWN          1
#define PHY_RX_PRMB_LEN_KNOWN            0

/* Set types */
typedef enum
{
	PHY_RX_SET_AGC       = 0,
	PHY_RX_SET_PPDU_INFO = 1,
	PHY_RX_SET_ROBOMODE  = 2,
	PHY_RX_NUM_SET_TYPES = 3
}PHY_rxSetType_t;

/* Alarm */
typedef enum
{
	PHY_RX_ALARM_PPDU_HDR_CRC_FAIL_CB_ID   = 0,
	PHY_RX_ALARM_PPDU_HDR_SYNTAX_ERR_CB_ID = 1,
	PHY_RX_NUM_ALARM_CB                    = 2
}PHY_rxAlarmCbId_t;

// carrier detect
typedef enum
{
	PHY_RX_CD_PRMB_NOT_DETECTED  = 0,
	PHY_RX_CD_PRMB_DETECTED      = 1,
	PHY_RX_CD_HDR_DONE           = 2,
	PHY_RX_CD_DATA_DONE          = 3
}PHY_rxCdDetectStatus_t;

typedef enum
{
	PHY_RX_ALGN_CASE1            = 0,
	PHY_RX_ALGN_CASE2            = 1,
	PHY_RX_ALGN_CASE3            = 2
}PHY_rxFrmAdjCase_t;

/* Get types */
typedef enum
{
	PHY_RX_GET_AGC       = 0,
	PHY_RX_GET_CD        = 1,
	PHY_RX_GET_NL        = 2,
	PHY_RX_GET_SNR       = 3,
	PHY_RX_GET_RQ        = 4,
	PHY_RX_GET_ROBOMODE  = 5,
	PHY_RX_NUM_GET_TYPES = 6
}PHY_rxGetType_t;

/* Rx processing mode */
typedef enum
{
	PHY_RX_PROC_HDR_0 = 0,
	PHY_RX_PROC_HDR_1 = 1,
	PHY_RX_PROC_DATA  = 2
}PHY_rxProcMode_t;

/* Channel status */
typedef enum
{
	PHY_RX_CHAN_IDLE          = 0,
	PHY_RX_CHAN_NOT_DONE      = 1,
	PHY_RX_CHAN_LOCKED        = 2,
	PHY_RX_CHAN_SUSPENDED     = 3,
	PHY_RX_CHAN_RESUMED       = 4
}PHY_rxChanStatus_t;

/* SSM error codes */
typedef enum
{
	PHY_RX_SSM_ERR_TIMEOUT        = 0,  // no beacon over 1 MAC frame 
	PHY_RX_SSM_ERR_SYNC_FALSE     = 1,  // false detection 
	PHY_RX_SSM_ERR_HDR_CRC_FAIL   = 2,  // prmb detected, hdr CRC fail
	PHY_RX_SSM_ERR_DATA_CRC_FAIL  = 3,  // prmb detected, payload CRC fail
	PHY_RX_SSM_ERR_RX_BUF_OVRN    = 4   // prmb detected, payload CRC fail
}PHY_rxSsmErrCode_t;

/*****************************************************************************/
/* Top level State definitions                                               */
/*****************************************************************************/
typedef enum
{
	PHY_RX_TOP_IDLE        = 0,        // Idle
	PHY_RX_TOP_IACQ        = 1,        // Initial acquisition (cold start)
	PHY_RX_TOP_LSTN        = 2,        // Listen to line (SCP)
	PHY_RX_TOP_HOLD        = 3,        // Hold off Rx (Tx active)
	PHY_RX_TOP_SCHD        = 4,        // scheduled burst reception (beacon/CFP)
	PHY_RX_NUM_TOP_STATES     = 5
}PHY_rxTopState_t;

typedef enum
{
	PHY_RX_TOP_EVT_READY      = 0,        // Ready
	PHY_RX_TOP_EVT_START      = 1,        // Start hunt for beacon
	PHY_RX_TOP_EVT_DONE       = 2,        // Done
	PHY_RX_TOP_EVT_SCHD       = 3,        // Schedule burst 
	PHY_RX_TOP_EVT_STOP       = 4,        // Stop RX state machine
	PHY_RX_TOP_EVT_FAIL       = 5,        // Failure
	PHY_RX_NUM_TOP_EVENTS     = 6
}PHY_rxTopEvent_t;

/*****************************************************************************/
/* SSM definitions                                                           */
/*****************************************************************************/
typedef enum
{
	PHY_RX_SSM_HUNT          = 0,        // Hunt - syncp detect 
	PHY_RX_SSM_VFY           = 1,        // Verify - syncm detect 
	PHY_RX_SSM_SYNC          = 2,        // Sync - FFT placement and header symb 
	PHY_RX_SSM_ALGN          = 3,        // Align - align symbol (hdr / data)
	PHY_RX_SSM_HDR2          = 4,        // hdr2  - process 2nd header symbol
	PHY_RX_SSM_STDY          = 5,        // Steady state - PPDU
	PHY_RX_NUM_SSM_STATES    = 6
}PHY_rxSsmState_t;

typedef enum
{
	PHY_RX_SSM_EVT_READY     = 0,        // Ready
	PHY_RX_SSM_EVT_DONE      = 1,        // Done
	PHY_RX_SSM_EVT_HDR_DONE  = 2,        // header decoded Done
	PHY_RX_SSM_EVT_ERR       = 3,        // Error 
	PHY_RX_NUM_SSM_EVENTS    = 4
}PHY_rxSsmEvent_t;

/* Get AAGC info data structure */
typedef struct
{
	UINT16 mode;                 // 0=auto, 1=manual
	UINT16 step;                 // Current AAGC gain setting = 0 to N-1 in AAGC gain_step_dB
}PHY_rxAagcGet_t;

/* Get carrier detect data structure */
typedef struct
{
	UINT32 busyTime;             // 20-bit absolute time
	UINT16 detected;             // 0 = not detected, 1 = detected
	UINT16 rssi;                 // RSSI of preamble detected
	UINT16 status;               // 1 = preamble detected, but len unknown from header decoding
                                // 0 = otherwise
}PHY_rxCdGet_t;

/* Get data structure */
typedef union
{
	PHY_rxAagcGet_t aagc;
	PHY_rxCdGet_t   cd;
	UINT16          nl;          // noise level 0 to 15 (50 to 92 dBuV in 3 dB step)
	UINT16          snr;         // snr 0 tp 7 (0 to 18 dB in 3 dB step)
	UINT16          rq;          // receive quality (0 to 8 from bad to good)
	UINT16          roboMode;    // ROBO mode (1), PRIME mode (0)
}PHY_rxGetData_t;

/* Rx PPDU information data structure */
typedef struct
{
	UINT16 id;       // ppdu ID
	UINT16 length;   // number of (MAC_H + payload) bytes)
	UINT16 QuantizedLevel;    // received level
							// 0: <= 70 dBuV
							// 1: <= 72 dBuV
							// 15: < 98 dBuV
	SINT16 QuantizedSnr;      // SNR
							// 0 to 7 with 3dB step
	UINT16 mcs;      // modulation coding scheme:
				     // 0: DBPSK
				     // 1: DQPSK
				     // 2: D8PSK
				     // 3: not used
				     // 4: DBPSK + FEC
				     // 5: DQPSK + FEC
				     // 6: D8PSK + FEC
	UINT16 *data_p;  // pointer to data (MAC_H + payload)
	UINT32 time;     // time when preamble is received
}PHY_rxPpdu_t;

typedef struct
{
	/* number of ppdu to run */
	UINT16 dbgn;             

	/* sync dump */
	UINT16 huntLog[20];
	UINT16 huntCnt;

	/* sync threshold */
	UINT16 syncThold;     // full corr threshold in Q8
	UINT16 pathThold;     // path threshold in Q8
	UINT16 maxPTholdAdj;  // max adjustment to tighten path threshold

	UINT16 vfyThold;      // verify threshold

	SINT16 sync_delay_adj;

	/* dc */
	UINT16 dcBypass;     // bypass dc removal

	/* aagc */
	UINT16 aagcBypass;    // bypass pga 
	UINT16 aagcFixGain;   // gain to apply (0 to 7) in 6dB step

	/* dagc */
	UINT16 dagcFix;       // Freeze DAGC w/ dagcGain for all
	UINT16 dagcGain;      // linear gain in Q5

	/* scaling */
	UINT16 fftShift;      // shift fft o/p
	UINT16 llrShift; 
	UINT16 nveShift;

	/* noise */
	UINT16 nbiThold;
	UINT16 syncNbiThold;

	/* no header parser yet, use this */
	UINT16 hdrCrcBypass;  // bypass header CRC check
	UINT16 hdrBypass;     // bypass decoded header info and used followings
	UINT16 mod;
	UINT16 nSBits;
	UINT16 nSymbols;
	UINT16 nPadBytes;

	/* detection interval */
	UINT16 prmbItvl;      // Number of symbols between preamble 
						// used for missed detection

}PHY_rxDbg_t;

/* counters */
typedef struct
{
	UINT32         runCnt;                           // SM run counter
	UINT32         prmbCnt;                          // Count preamble detected (both syncp & syncm)
	UINT32         ppduCnt;                          // PPDU running counter

	UINT32         falseCnt;                         //syncp detected but syncm failed

	UINT32         prvHuntCnt;                       // previous run count when preamble is detected
	UINT32         huntMissCnt;                      // running counter for missed detection
	UINT32         hdrCrcCnt;                        // PPDU header CRC counter
	UINT32         dataCrcCnt;                       // data payload CRC counter

	UINT32         berCnt;                           // bit error count for curr PPDU
	UINT16         perCnt;                           // count for PER till curr PPDU
	UINT16         bitRxCnt;                         // bit received count for curr PPDU

	UINT16         nbiCnt;                           // Number of NBI detected
	UINT16         nbiPrmbCnt;
	UINT32         txWaitCnt;                        // Count when waiting for Tx
	UINT32         ppduRelCnt;                       // Count number of ppdu release from MAC
	UINT32         bufOverRunCnt;                    // Count number of ppdu w/o rx buf ready
	UINT32         afeErrCnt;                        // Count when afe dma and sw misalign (not use for now)
}PHY_rxCnt_t;

/* Carrier detect data structure */
typedef struct
{
	UINT16         status;                           // carrier detect status
	SINT32         prmbDetTime;                      // Preamble detected time (abs time in 10us)
	SINT32         hdrEndTime;                       // Header end time (abs time in 10 us)
	SINT32         pktEndTime;                       // PPDU end time (abs in 10 us)
}PHY_cd_t;

/* Prime header information */
typedef struct
{
	UINT16 mod;        // modulation (see prime_phy.h)
	UINT16 fec;        // FEC (see prime_phy.h)
	UINT16 nSymbols;   // PPDU payload length (in symbols)
	UINT16 nPadBits;   // padding len (in bytes)
}PHY_rxHdr_t;

/* PHY rx working buffer1 structure */
typedef union
{
	ComplexShort symbBuf[97];        // eqz/ns^2/sigma2_p - steady
}PHY_rxSBuf_t;

typedef struct
{
	PHY_rxSBuf_t sBuf;
	SINT16       sBitsBuf[96];        // gamma/llr - steady payload
	SINT16       dBitsBuf[96];   // deinterleaved bits - steady
}PHY_rxBuf1_t;


/* PHY rx working buffer2 structure */
/* Note this buffer is to be shared w/ DFE buffer => size = 128 */
typedef struct
{
	SINT16       sBitsHdrBuf[84 << 1];   // soft bits - steady header
}PHY_rxBuf2_t;

typedef struct
{
	ComplexShort rxRotBuf[128];
}PHY_rxSyncBuf_t;

typedef union
{
	PHY_rxSyncBuf_t sync;

	ComplexShort    dfeExBuf[256];

	SINT16          afeTmpBuf[576]; 

	SINT16          vitInBuf[512];
}PHY_rxBuf3_t;

typedef struct
{
	UINT32 engyThold;
	SINT16 pathThold;                  // threshold during wnd placement
	SINT16 pathShift;                  // factor used to tighten num paths 
									 // (k1 to kN)

	SINT16 kIdx;                       // index where correlation passed threshold
	SINT16 fftStart;                   // index where next fft start

	UINT16 cnt;                        // counter for number of symbol time
	UINT16 nTAdj;                      // number of times to adjust path threshold

	SINT32 cmax;                       // max correlation in search window
	UINT32 engy;                       // energy @ corr pass point

	ComplexShort        *rxIn_p[4];    // pointer to start of rx i/p buf
	UINT16              rxIdx;
	const ComplexShort  *prmb_p;       // pointer to prmb for corr
	ComplexShort        *chestBuf_p;
	UINT32              *engyBuf_p;    // pointer to energy

	SINT16              *rotTbl_p;     // pointer to rotation table (128-entry sine)
	ComplexShort        *rxRot_p;      // Rotated tones

	ComplexShort        vfy_cc;        // sum(Xk*conj(Yk))

	UINT32              pwr_cc;        // |vfy_cc|^2
	UINT32              pwr_xy;        // sum(|Xk|.^2)*sum(|Yk|.^2)

	UINT16              syncStat;      // 0-nothing; 1-SYNCP; 2-SYNCM
	UINT16              startCnt;

	UINT16              kStartIdx;
	UINT16              kLastIdx;

	UINT16              syncPCnt;
	UINT16              syncMCnt;

	UINT16              syncm_vfy_cnt;
	UINT16              syncp_recheck_fail_cnt;
}PHY_sync_t;

/* PHY rx data structure */
typedef struct
{
	PHY_rxCnt_t    cnt;
	UINT16         iacqCnt;                          // initial sync cnt
	UINT16         symbCnt;                          // payload symbol counter
	UINT16         firstDma;                         // Skip first dma after DMA start (interrupt @ start)
	UINT16         huntATryCnt;                      // Count hunt w/ aagc alg A
	UINT16         huntCTryCnt;                      // Count hunt w/ aagc alg C
	UINT16         huntCTryMax;                      // Max try for aagc alg C

	PHY_cd_t       cd;                               // Carrier detect data structure
	PHY_aagc_t     aagc;                             // AAGC data structure
	PHY_dagc_t     dagc;                             // DAGC data structure
	PHY_fir_t      lpf;                              // LPF after the mixer
	PHY_sync_t     sync;                             // Sync data structure
	PHY_cfft16_t   fft;                              // fft structure
	PHY_cfft16_t   ifft;                             // ifft structure
	PHY_nve_t      nve;
	PHY_rxHdr_t    hdr;                              // header information

	/* sync long frm and header crc */
	UINT16         hdrCrcFlag;

	/* DC */
	SINT16         dc;                               // DC

	/* input referred measurements */
	UINT32         prmbPower;                        // preamble power
	UINT32         rxPower;                          // PPDU receive power
	UINT32         nsPower;                          // PPDU ns power

	/* frame alignment (@ 250 kHz) */
	UINT16         k1;
	UINT16         k2;

	UINT16         rxAlgnCase;
	SINT16         frmAdjSz;                         // adjust size for frm alignment

	/* Bit processing */
	UINT16         nSBits;                           // Number of soft bits from
												   // equalizer per data symbol

	UINT16         nVitBlk;                          // Number of viterbi blk ran

	/* Works on AFE buffer */
	SINT16        *afeInBuf_p[2];   // pointer to AFE i/p buf
												   // (from ADC o/p)
	UINT16        afeNSamps[2];
	SINT16        *afeTmpBuf_p;

	/* Works on DFE buffer */
	ComplexShort  *dfeOutBuf_p[4];  // pointer to DFE o/p buf
												   // (from filter o/p)
												   // (fft i/p and o/p)

	/* Working buffers */
	PHY_rxBuf1_t  *procBuf1_p;
	PHY_rxBuf2_t  *procBuf2_p;

	/* Works on Symbol buffer */
	ComplexShort  *eqzInBuf_p;                       // pointer to equalizer i/p buf

	UINT16        *nbiBuf_p;
	UINT32        *syncNbiBuf_p;

	/* Works on Soft bits buffer */
	SINT16        *dtlvInBuf_p;                      // pointer to de-interleave i/p bit buf

	/* Works on deinterleave soft bits buffer */
	SINT16        *dscmInBuf_p;                      // pointer to descrambling i/p bit buf

	/* Works on deinterleave to viterbi buffer */
	Buffer_t       d2vBufD;                          // Circular buffer from descrambler o/p
												   // to viterbi i/p
	/* Works on mac/phy data buffer */
	UINT16        *p2mBuf_p[2];    // buffer pointer for viterbi o/p (phy2mac)
	UINT16        p2mBufReady;                       // p2m buffer ready to be used
	UINT16        *p2mData_p;                        // data pointer for viterbi o/p


	/* indices */
	UINT16         p2mWtIdx;                         // PHY write ppdu index
	UINT16         p2mRdIdx;                         // MAC read ppdu index

	UINT16         afeIdx;                           // AFE buffer index
												   // (ping pong buffer)
												   // SW operates

	UINT16         dfeIdx;                           // DFE buffer index
												   // (tracks filtering o/p - DFE buffer)

	UINT16         fftIdx;                           // FFT in/out buffer index
												   // (tracks in/out from FFT - DFE buffer)
												   // (FFT works on inplace)
												   // SYNC/FFT operates on
	UINT16         dfeSkipFlag;                       // dfeOutFlag=1: compute a DFE output sample;

	ComplexShort   *dnCvtLut_p;
												   //            0: no DFE output smaple
	SINT32         dcSum;                            // DC sum

	UINT32         aagcSqrSum;                       // AAGC sum(x^2)
	UINT32         aagcPower;                        // AAGC Power

	ComplexShort   *dfeBufPtr_p;                     // Pointer to the last element of Previous buffer pointer + 1
												   // or to the first element of current active buffer
	UINT16         dfeBufSize;                       // Previous active buffer size
}PHY_rxData_t;

/* PHY Rx BERT */
typedef struct
{
	UINT32 bitErrCnt[8];   // bit error count
	UINT32 bitTotCnt[8];   // bit received count
	UINT16 ppduErrCnt[8];  // pkt error count
	UINT16 ppduTotCnt[8];  // pkt received count

	UINT32 phyRawDataRate;              // phy raw data rate based on MCS
	UINT32 phyActualRxBits;             // phy actual rx bits;
}PHY_rxBert_t;

/* PHY RX statistics data structure */
typedef struct
{
	UINT16 phyCrcIncorrectCount; // # of bursts received with CRC errors
	UINT16 phyCrcFailCount;      // # of bursts received with correct CRC but invalid protocol header
	UINT16 phyRxDropCount;       // # of received PPDU drop owing buffer overrun
	UINT16 phyRxQueueLen;        // # of concurrent MPDUs Rx buffer can hold

	UINT32 phyRxProcDelay;       // time in us from PPDU received from AFE to MPDU available to MAC
	UINT32 phyRxPpduCount;       // # of packets received since switched on

	SINT16 phyAgcMinGain;        // minimum gain for AGC <0dB
	UINT16 phyAgcStepValue;      // distance between steps in dB < 6dB
	UINT16 phyAgcStepNum;        // number of steps so that phyAgcMinGain+((phAgcStepNum - 1)*phyAgcStepValue) >= 21dB

	SINT16 phyRxEvmAvg;          // Moving average of EVM as returned by SNR primitive 7 integer bits and 3 fract bits
	SINT16 phyRxEmaSmoothing;    // Smoothing factor for EVM average
}PHY_rx_stat_t;

/* PHY alarm */
typedef struct
{
	UINT16 hdrCrcCnt;  // alram counter for header CRC fail
	UINT16 hdrErrCnt;  // alarm counter for header syntax err
}PHY_rxAlarmCnt_t;

/* Callback functions */
typedef void (*PHY_rxAlarmCbFunc_t)(void);
typedef void (*PHY_rxSnifferCbFunc_t)(void *buf, SINT16 bufsiz, UINT32 timestamp);

/* PHY Rx Handle */
typedef struct
{
	FSM_stateMachine_t  *smTop_p;           // Top level state machine
	FSM_stateMachine_t  *smIacq_p;          // Initial acquisition SSM
	FSM_stateMachine_t  *smLstn_p;          // Listen SSM
	FSM_stateMachine_t  *smSchd_p;          // Schduled burst SSM

	UINT16               syncTimeOut;       // sync timeout in symbol
	UINT16               chanStatus;        // channel status

	UINT16               syncReport;
	UINT16               suspendFlag;       // need to suspend
	UINT16               resumeFlag;        // need to resume
	UINT16               huntTimerExpired;  // hunt timer expired flag
	UINT16               ssmErrCode;        // ssm err code

	UINT16               nodeIdx;           // Node that receiving from
	SINT16               rssi;              // in dBuV
	SINT16               snr;               // in dB
	SINT16               nl;                // in dBuV

	PHY_cbFunc_t         cbSync_p;          // sync callback
	PHY_cbFunc_t         cbPpdu_p;          // received PPDU callback
	PHY_cbFunc_t         cbSuspend_p;       // suspend callback
	PHY_rxAlarmCbFunc_t  cbAlarm_p[PHY_RX_NUM_ALARM_CB];  // alarm callback

	PHY_rx_stat_t        stat;              // rx statistics
	PHY_rxAlarmCnt_t     alarm;             // alarm counter

	UINT16               roboMode;          // 1-ROBO; 0-PRIME
	UINT16               rsvd;

	PHY_rxSnifferCbFunc_t cbSniffer_p;      // sniffer callback

	// Robert, simulate the PHY error
	UINT16	simPhyCrc;
	UINT16    simPhyHdrErr;
} PHY_rxHandle_t;

/* Set AAGC data structure */
typedef struct
{
	UINT16 mode;                 // 0=auto, 1=manual
	UINT16 step;                 // If manual, AAGC gain step = 0 to N-1 in AAGC gain_step_dB
}PHY_rxAagcSet_t;

/* Set PPDU info data structure */
typedef struct
{
	UINT16 ppduId;               // PPDU ID that was received from PHY
	UINT16 nodeId;               // node ID for the PPDU received
}PHY_rxPpduSet_t;

/* Set data structure */
typedef union
{
	PHY_rxAagcSet_t aagc;
	PHY_rxPpduSet_t ppdu;
	UINT16          roboMode;
}PHY_rxSetData_t;

extern UINT16 PHY_rxSuspend_done;

PHY_status_t PHY_rxSchdule(void);
PHY_status_t PHY_rxSchResume(void);
PHY_status_t PHY_rxSuspend(PHY_cbFunc_t cb_p);
PHY_status_t PHY_rxResume(void);
PHY_status_t PHY_rxSet(UINT16 setType, PHY_rxSetData_t *setData_p);
void PHY_rxSuspend_cb(PHY_ev_t eventID, PHY_cbData_t *cbData_p);

PRIME_status_t PHY_nop(void *data_p);
PRIME_status_t PHY_rxStop(void *data_p);
PRIME_status_t PHY_rxSchProc(void *data_p);
PRIME_status_t PHY_rxSchStart(void *data_p);
PRIME_status_t PHY_rxWaitTxProc(void *data_p);
PRIME_status_t PHY_rxListenProc(void *data_p);
PRIME_status_t PHY_rxListenStart(void *data_p);
PRIME_status_t PHY_rxIacqProc(void *data_p);
PRIME_status_t PHY_rxIacqStart(void *data_p);
PRIME_status_t PHY_rxHuntProc(void *data_p);
PRIME_status_t PHY_rxVfyStart(void *data_p);
PRIME_status_t PHY_rxSsmErrHdlr(void *data_p);
PRIME_status_t PHY_rxVfyProc(void *data_p);
PRIME_status_t PHY_rxSyncStart(void *data_p);
PRIME_status_t PHY_rxSyncProc(void *data_p);
PRIME_status_t PHY_rxStdyStart(void *data_p);
PRIME_status_t PHY_rxAlgnProc(void *data_p);
PRIME_status_t PHY_rxHdr2Proc(void *data_p);
PRIME_status_t PHY_rxStdyProc(void *data_p);
PRIME_status_t PHY_rxPduDone(void *data_p);

PHY_status_t PHY_rxInit(void);
PHY_status_t PHY_rxSmRun(void);
PRIME_status_t PHY_rxHdrProc();
PHY_status_t PHY_rxStart(UINT16 timeOut, PHY_cbFunc_t cb_p);

void PHY_rxBerCnt(UINT16 *d_p, SINT16 nBytes);
void PHY_rxBitProcData(SINT16 nSBits);
void PHY_rxAvgPower(UINT32 spwr, UINT32 npwr);
void PHY_rxRoboCombine(UINT16 numBlkLog2, UINT16 blkSize);
void PHY_rxDataProc();
void PHY_rxHuntReset(void);
void PHY_syncInit(PHY_sync_t *sync_p, ComplexShort **in_p, const ComplexShort *prmb_p, 
				  ComplexShort *chestBuf_p, const SINT16 *rotTbl_p, ComplexShort *rxRot_p);

PHY_status_t PHY_rxSetAagc(PHY_rxSetData_t *setData_p);
PHY_status_t PHY_rxSetPpduInfo(PHY_rxSetData_t *setData_p);
PHY_status_t PHY_rxSetRoboMode(PHY_rxSetData_t *setData_p);
PHY_status_t PHY_rxGetAagc(PHY_rxGetData_t *getData_p);
PHY_status_t PHY_rxGetCd(PHY_rxGetData_t *getData_p);
PHY_status_t PHY_rxGetNl(PHY_rxGetData_t *getData_p);
PHY_status_t PHY_rxGetSnr(PHY_rxGetData_t *getData_p);
PHY_status_t PHY_rxGetRq(PHY_rxGetData_t *getData_p);
PHY_status_t PHY_rxGetRoboMode(PHY_rxGetData_t *getData_p);

void PHY_rxAfeBufInit();

#endif //_PHY_RX_H